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HSDL-3600 #007/#008/#107
IrDA(R) Compliant 4 Mb/s 3 V Infrared Transceiver
Data Sheet
Description The HSDL-3600 is a low-profile infrared transceiver module that provides interface between logic and IR signals for through-air, serial, half-duplex IR data link. The module is compliant to IrDA Data Physical Layer Specifications 1.1 and IEC825-Class 1 Eye Safe. The HSDL-3600 contains a high-speed and highefficiency 870 nm LED, a silicon PIN diode, and an integrated circuit. The IC contains an LED driver and a receiver providing a single output (RXD) for all data rates supported.
Functional Block Diagram
VCC
R1 LEDA (10)
Features * Fully compliant to IrDA 1.1 physical layer specifications 9.6 kb/s to 4 Mb/s operation * Typical link distance >1.5 m * Compatible with HP-SIR and TV remote * IEC825-Class 1 eye safe * Low power operation: 2.7 V to 3.6 V * Small module size: 4.0 x 12.2 x 5.1 mm (HxWxD) * Complete shutdown: TXD, RXD, PIN diode * Low shutdown current: 10 nA typical * Adjustable optical power management: Adjustable LED drive-current to maintain link integrity * Single Rx data output: Speed select by FIR select pin * Integrated EMI shield: Excellent noise immunity * Edge detection input: Prevents the LED from long turnon time * Interface to various super I/O and controller devices * Designed to accommodate light loss with cosmetic window * Only 2 external components are required Applications * Digital imaging - Digital still cameras - Photo-imaging printers * Data communication - Notebook computers - Desktop PCs - Win CE handheld products - Personal Digital Assistants (PDAs) - Printers - Fax machines, photocopiers - Screen projectors - Auto PCs - Dongles - Set-top box * Telecommunication products - Cellular phones - Pagers * Small industrial & medical instrumentation - General data collection devices - Patient & pharmaceutical data collection devices * IR LANs
TXD (9)
SP
MD0 (4) MD1 (5)
HSDL-3600
RXD (8)
FIR_SEL (3) CX1 GND (7) CX2 VCC (1) AGND (2)
The HSDL-3600 can be completely shut down to achieve very low power consumption. In the shut down mode, the PIN diode will be inactive and thus producing very little photo-current even under very bright ambient light. The HSDL-3600 also incorporated the capability for adjustable optical power. With two programming pins; MODE 0 and MODE 1, the optical power output can be adjusted lower when the nominal desired link distance is one-third or two-third of the full IrDA link.
The HSDL-3600 comes in three package options; the front view option (HSDL-3600#007/#017), the front view guide pin option (HSDL-3600#107/#117), and the top view option (HSDL-3600#008/ #018). All options come with integrated shield that helps to ensure low EMI emission and high immunity to EMI field, thus enhancing reliable performance.
Application Support Information The Application Engineering group is available to assist you with the technical understanding associated with HSDL-3600 infrared transceiver module. You can contact them through your local sales representatives for additional details.
Ordering Information Package Option Package Part Number Standard Package Increment
Front View
HSDL-3600#007
400
Front View
HSDL-3600#017
10
Top View
HSDL-3600#008
400
Top View
HSDL-3600#018
10
Front View (with guide pin)
HSDL-3600#107
300
Front View (with guide pin)
HSDL-3600#117
10
2
Functional Block Diagram
VCC
I/O Pins Configuration Table Pin 1 2 3 4 5 6 7 8 9 10 Description Supply VoltageVcc Analog GroundAGND FIR Select Mode 0 Mode 1 No Connection Ground Receiver Data Output Transmitter Data Input LED Anode Symbol
R1 LEDA (10)
TXD (9)
SP
MD0 (4) MD1 (5)
HSDL-3600
RXD (8)
FIR_SEL MD0 MD1 NC GND RXD TXD LEDA
FIR_SEL (3) CX1 GND (7) CX2 VCC (1) AGND (2)
10 9 8 7 6 5 4 3 2 1 10 9 8 7 6 5 4 3 2 1
BACK VIEW (HSDL-3600 #007/#017)
BOTTOM VIEW (HSDL-3600 #008/#018)
Transceiver Control Truth Table Mode 0 1 0 0 1 0 0 1
X = Don't Care
Mode 1 0 0 1 1 0 1 1
FIR_SEL X 0 0 0 1 1 1
RX Function Shutdown SIR SIR SIR MIR/FIR MIR/FIR MIR/FIR
TX Function Shutdown Full Distance Power 2/3 Distance Power 1/3 Distance Power Full Distance Power 2/3 Distance Power 1/3 Distance Power
Transceiver I/O Truth Table Transceiver Mode Active Active Active Active Shutdown
X= Don't Care
Inputs FIR_SEL X 0 1 X X TXD 1 0 0 0 X[4] EI X High[1] High[2] Low Low LED On Off Off Off Not Valid
Outputs RXD Not Valid Low[3] Low[3] High Not Valid
EI = In-Band Infrared Intensity at detector
Notes: 1. In-Band EI 115.2 kb/s and FIR_SEL = 0. 2. In-Band EI 0.576 Mb/s and FIR_SEL = 1. 3. Logic Low is a pulsed response. The condition is maintained for duration dependent on the pattern and strength of the incident intensity. 4. To maintain low shutdown current, TXD needs to be driven high or low and not left floating.
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Recommended Application Circuit Components Component R1 CX1[5] CX2[6] Recommended Value 2.2 5%, 0.5 Watt, for 2.7 Vcc 3.3 V operation 2.7 5%, 0.5 Watt, for 3.0 Vcc 3.6 V operation 0.47 F 20%, X7R Ceramic 6.8 F 20%, Tantalum
Notes: 5. CX1 must be placed within 0.7 cm of the HSDL-3600 to obtain optimum noise immunity. 6. In environments with noisy power supplies, supply rejection performance can be enhanced by including CX2, as shown in "HSDL-3600 Functional Block Diagram" in page 3.
0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 1.3 1.5 1.7 1.9 2.1 2.3
LOP (mW/sr)
450 400 350 300 250 200 150 100 50 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
ILED (A)
LEDA VOLTAGE (V)
ILED (A)
ILED vs. LEDA.
Light Output Power (LOP) vs. ILED.
Marking Information The HSDL-3600#007/017 is marked "3600YYWW' on the shield where "YY" indicates the unit's manufacturing year, and "WW" refers to the work week in which the unit is tested. The HSDL-3600#008/018 is marked a "black" dot on the shield.
Ma
CAUTIONS: The BiCMOS inherent to the design of this component increases the component's susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
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Absolute Maximum Ratings [7] Parameter Storage Temperature Operating Temperature DC LED Current Peak LED Current Symbol TS TA ILED(DC) ILED (PK) Minimum -40 -20 Maximum +100 +70 165 650 750 LED Anode Voltage Supply Voltage Transmitter Data Input Current Receiver Data Output Voltage VLEDA Vcc ITXD(DC) VO -0.5 0 -12 -0.5 7 7 12 Vcc+0.5 Unit C C mA mA mA V V mA V |IO(RXD)| = 20 A Conditions
90 s pulse width, 25% duty cycle 2 s pulse width, 10% duty cycle
Note: 7. For implementations where case to ambient thermal resistance 50C/W.
Recommended Operating Conditions Parameter Operating Temperature Supply Voltage Logic High Input Voltage for TXD, MD0, MD1, and FIR_SEL Logic Low Transmitter Input Voltage LED (Logic High) Current Pulse Amplitude Receiver Signal Rate Ambient Light Symbol TA Vcc VIH Min. -20 2.7 2 Vcc/3 Max. +70 3.6 Vcc Unit C V V Conditions
VIL ILEDA
0 400 0.0024
Vcc/3 650 4
V mA Mb/s See IrDA Serial Infrared Physical Layer Link Specification, Appendix A for ambient levels
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Electrical & Optical Specifications Specifications hold over the Recommended Operating Conditions unless otherwise noted. Unspecified test conditions can be anywhere in their operating range. All typical values are at 25C and 3.3 V unless otherwise noted. Parameter Transceiver Supply Current Digital Input Current Transmitter Transmitter Radiant Intensity Symbol Shutdown Idle Logic Low/High Logic High Intensity Peak Wavelength Spectral Line Half Width Viewing Angle Optical Pulse Width ICC1 ICC2 IL/H Min. Typ. 10 2.5 -1 Max. 200 5 1 Unit nA mA A Conditions VI(TXD) VIL or VI(TXD) VIH VI(TXD) VIL, EI = 0 0 VI VCC
IEH
100
250
400
mW/sr
VIH = 3.0 V ILEDA = 400 mA 1/2 15
P 1/2
875 35
nm nm
21/2 tpw (IE)
30 1.5 148 115 1.6 217 125
60 1.8 260 135 40
s ns ns ns tpw(TXD) = 1.6 s at 115.2 kb/s tpw(TXD) = 217 ns at 1.15 Mb/s tpw(TXD) = 125 ns at 4.0 Mb/s tpw(TXD) = 125 ns at 4.0 Mb/s tr/f(TXD) = 10 ns TXD pin stuck high
Rise and Fall Times Maximum Optical Pulse Width LED Anode On State Voltage LED Anode Off State Leakage Current
tr (IE), tf (IE) tpw (max) 20
50
s
VON(LEDA) ILK(LEDA) 1
2.4 100
V nA
ILEDA = 400 mA, VI(TXD) VIH VLEDA = VCC = 3.6 V, VI(TXD) VIL
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Electrical & Optical Specifications Specifications hold over the Recommended Operating Conditions unless otherwise noted. Unspecified test conditions can be anywhere in their operating range. All typical values are at 25C and 3.3 V unless otherwise noted. Parameter Receiver Receiver Data Output Voltage Symbol Logic Low[9] VOL Min. 0 Typ. Max. 0.4 Unit V Conditions IOL = 1.0 mA, EI 3.6 W/cm2, 1/2 15 IOH = -20 A, EI 0.3 W/cm2, 1/2 15
Logic High
VOH
Vcc - 0.2
-
Vcc
V
Viewing Angle Logic High Receiver Input Irradiance
21/2 EIH
30 0.0036 0.0090 500 500 0.3 880 1 100 85 4.0 500 165
mW/cm2 For in-band signals 115.2 kb/s[8] mW/cm2 0.576 Mb/s in-band signals 4 Mb/s[8] 2 For in-band signals[8] W/cm nm s ns ns 1/2 15[10], CL =10 pF 1/2 15[11], CL =10 pF 1/2 15[12], CL =10 pF, VCC = 3 - 3.6 V 1/2 15[12], CL =10 pF, VCC = 2.7 V 500 kHz/50% duty cycle carrier ASK[13]
Logic Low Receiver Input Irradiance Receiver Peak Sensitivity Wavelength Receiver SIR Pulse Width Receiver MIR Pulse Width Receiver FIR Pulse Width
EIL P tpw (SIR) tpw (MIR) tpw (FIR)
190
ns
Receiver ASK Pulse Width Receiver Latency Time for FIR Receiver Latency Time for SIR Receiver Rise/Fall Times Receiver Wake Up Time
tpw (ASK) tL (FIR) tL (SIR) tr/f (RXD) tW
1 40 20 25 50 50 100
s s s ns s
[14]
Notes: 8. An in-band optical signal is a pulse/sequence where the peak wavelength, p, is defined as 850 p 900 nm, and the pulse characteristics are compliant with the IrDA Serial Infrared Physical Layer Link Specification. 9. Logic Low is a pulsed response. The condition is maintained for duration dependent on pattern and strength of the incident intensity. 10. For in-band signals 115.2 kb/s where 3.6 W/cm2 EI 500 mW/cm2. 11. For in-band signals at 1.15 Mb/s where 9.0 W/cm2 EI 500 mW/cm2. 12. For in-band signals of 125 ns pulse width, 4 Mb/s, 4 PPM at recommended 400 mA drive current. 13. Pulse width specified is the pulse width of the second 500 kHz carrier pulse received in a data bit. The first 500 kHz carrier pulse may exceed 2 s in width, which will not affect correct demodulation of the data stream. An ASK or DASK system using the HSDL-3600 has been shown to correctly receive all data bits for 9 W/cm2 EI 500 mW/cm2 incoming signal strength. ASK or DASK should use the FIR channel enabled. 14. Wake up time is the time between the transition from a shutdown state to an active state and the time when the receiver is active and ready to receive infrared signals. 15. Shields to be grounded.
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TXD "Stuck ON" Protection
RXD Output Waveform
tpw
TXD
VOH
90% 50% 10%
LED
VOL
tpw (MAX.)
tf
tr
LED Optical Waveform
Receiver Wake Up Time Definition (when MD0 1 and MD1 0)
tpw LED ON 90% 50%
RX LIGHT
RXD
10% LED OFF
VALID DATA
tw
tr tf
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HSDL-3600#007 and HSDL3600#017 Package Outline with Dimension and Recommended PC Board Pad Layout HSDL-3600#007/#017 (Front Option)
MOUNTING CENTER 6.10 PIN 1 2 3 4 5 FUNCTION VCC AGND FIR_SEL MD0 MD1 PIN 6 7 8 9 10 FUNCTION NC GND RXD TXD LEDA 5.09 1.15 4.60
TOP VIEW
2.55
R 2.00
R 1.77
4.00 1.90 0.80 1.20 4.05 SIDE VIEW 3.24 12.20 +0.50 0 FRONT VIEW ALL DIMENSIONS IN MILLIMETERS (mm). DIMENSION TOLERANCE IS 0.20 mm UNLESS OTHERWISE SPECIFIED. MOUNTING CENTER MID OF LAND PIN 1 0.70 0.43 1.05
PIN 10 PIN 1
1.90 PIN 1 0.82 1.68 3.84 PIN 10
PIN 10
2.40
2.08 0.45 0.70 4.95 10 CASTELLATION: PITCH 1.1 0.1 CUMULATIVE 9.90 0.1 BACK VIEW 2.35
2.84 LAND PATTERN
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HSDL-3600#008 and HSDL3600#018 Package Outline with Dimension and Recommended PC Board Pad Layout HSDL-3600#008/#018 (Top Option)
R 2.00 PIN 1 2 3 4 5 FUNCTION VCC AGND FIR_SEL MD0 MD1 PIN 6 7 8 9 10 FUNCTION NC GND RXD TXD LEDA FRONT VIEW 0.90 4.89 1.35 4.40 R 1.78
LEGEND: MC - MOUNTING CENTER OC - OPTICAL CENTER
SHIELD PAD RECEIVE 2.40 0.30 0.85 2.50 TRANSMIT 5.00
OC 2.08 1.46 0.30 3.24 5.00
MC
OC 2.08
4.16
1.50 2.25 SIDE VIEW ALL DIMENSIONS IN MILLIMETERS (mm). DIMENSION TOLERANCE IS 0.20 mm UNLESS OTHERWISE SPECIFIED.
2.57 3.83 5.10 12.20 TOP VIEW 5.70
1.60
2.85
1.70
PIN 10
PIN 1
1.95 0.70 10 CASTELLATION: PITCH 1.1 0.1 CUM. OF 9 PITCH - 9.9 0.1
9.90
0.43 PIN 1 0.20 PIN 10 PITCH 9 x 1.10 10 x 0.60 PAD LAND PAD PATTERN
1.30
BOTTOM VIEW
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HSDL-3600#107 and HSDL-3600#117 Package Outline with Dimension and Recommended PC Board Pad Layout HSDL-3600#107/#117 (Top Option)
2.65
12.2
3.0
4 0.1
1.925 0.5 90 0 2-R 0.5 0.3 0.8 1.1 1.4 1.9 2.4 4.05 1.0 0.64 0.74 3.24 12.4 R 2.0 R 1.78 1.55 1.65 3.83 0.3
5.19 TOLERANCE 0.2 MIN. UNIT = mm 1.2 0.9
4.7
0.3
10 10-R 0.25 0.1
9
8
7
6
5
4
3
2
1 0.425
0.7 0.1
4.95
P1.1 0.1 x 9 = 9.9 0.1 1 VDD 2 AGND 3 FIREN 4 MD0 5 MD1 6 N.C. 7 GND 8 RXD 9 TXD 10 LEDA
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Tape and Reel Dimensions (HSDL-3600#007, #017) All dimensions in millimeters (mm) Quantity = 400 pieces per reel (HSDL-3600#007) Quantity = 10 pieces per tape (HSDL-3600#017)
13.00 0.50 R 1.00 (40 mm MIN.) EMPTY PARTS MOUNTED (400 mm MIN.) LEADER
21.00 0.80 2.00 0.50 DIRECTION OF PULLING EMPTY (40 mm MIN.)
CONFIGURATION OF TAPE LABEL
SHAPE AND DIMENSIONS OF REELS
4.00 0.10 2.00 0.10 1.75 0.10 1.50 POLARITY A 12.40 0.10 VDD 24.00 0.20 178.00 2.00 60.00 2.00 + 0.10 0 11.50 0.10
0.40 0.05 4.20 0.10
5.50 0.10 8.00 0.10 DIRECTION OF PULLING + 0.50 25.50 - 1.00
TAPE DIMENSIONS
1.60 0.50
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Tape and Reel Dimensions (HSDL-3600#008, #018) All dimensions in millimeters (mm) Quantity = 400 pieces per reel (HSDL-3600#008) Quantity = 10 pieces per tape (HSDL-3600#018)
13.00 0.50 R 1.00 (40 mm MIN.) EMPTY PARTS MOUNTED (400 mm MIN.) LEADER
21.00 0.80 2.00 0.50 DIRECTION OF PULLING EMPTY (40 mm MIN.)
CONFIGURATION OF TAPE LABEL
SHAPE AND DIMENSIONS OF REELS
4.00 0.10 2.00 0.10 1.75 0.10 1.50 + 0.10 11.50 0.10
POLARITY VDD 12.80 0.10 A 24.00 0.20 178.00 2.00 60.00 2.00
4.80 0.10 0.40 0.05 5.10 0.10 DIRECTION OF PULLING 5.65 0.10
5.30 0.10 8.00 0.10 + 0.50 25.50 - 1.00
TAPE DIMENSIONS
1.60 0.50
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Tape and Reel Dimensions (HSDL-3600#107, #117) All dimensions in millimeters (mm) Quantity = 300 pieces per reel (HSDL-3600#107) Quantity = 10 pieces per tape (HSDL-3600#117)
2.0 0.5 13.0 0.5 60.0 2.0 R 1.0 21.0 0.8 178.0 2.0
LABEL PASTED HERE 1.6 0.5 SHAPE AND DIMENSIONS OF REEL + 1.0 25.5 - 0.5
4.0 0.1 0.7 0.1 + 0.1 1.5 - 0 1.75 0.1
POLARITY A 12.7 0.10 VDD 0.4 0.05 4.3 0.1
11.5 0.1 24.0 0.2
5.7 0.1
8.0 0.1 DIRECTION OF PULLING OUT
DIMENSIONS OF TAPE
(40 mm MIN.) EMPTY
PARTS MOUNTED
(400 mm MIN.) LEADER
DIRECTION OF PULLING OUT N = 300 PCS
EMPTY (40 mm MIN.)
CONFIGURATION OF TAPE
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Moisture Proof Packaging All HSDL-3600 options are shipped in moisture proof package. Once opened, moisture absorption begins.
UNITS IN A SEALED MOISTURE-PROOF PACKAGE
PACKAGE IS OPENED (UNSEALED)
ENVIRONMENT LESS THAN 25C, AND LESS THAN 60% RH?
YES
NO
NO BAKING IS NECESSARY
PACKAGE IS OPENED MORE THAN 3 DAYS?
NO
YES
PERFORM RECOMMENDED BAKING CONDITIONS
Baking Conditions If the parts are not stored in dry conditions, they must be baked before reflow to prevent damage to the parts. Package In Reel In Bulk Temperature 60C 100C 125C Time 48 hours 4 hours 2 hours
Baking should only be done once.
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Reflow Profile
230
T - TEMPERATURE - (C)
MAX. 245C R3 R4
200 183 170 150 125 100 R1
R2
90 sec. MAX. ABOVE 183C
R5
50 25 0 P1 HEAT UP 50 100 150 200 P3 SOLDER REFLOW 250 P4 COOL DOWN 300
t-TIME (SECONDS) P2 SOLDER PASTE DRY
Process Zone Heat Up Solder Paste Dry Solder Reflow Cool Down
Symbol P1, R1 P2, R2 P3, R3 P3, R4 P4, R5
T 25C to 125C 125C to 170C 170C to 230C (245C at 10 seconds max.) 230C to 170C 170C to 25C
Maximum T/time 4C/s 0.5C/s 4C/s - 4C/s -3C/s
The reflow profile is a straightline representation of a nominal temperature profile for a convective reflow solder process. The temperature profile is divided into four process zones, each with different T/time temperature change rates. The T/time rates are detailed in the above table. The temperatures are measured at the component to printed circuit board connections. In process zone P1, the PC board and HSDL-3600 castellation I/O pins are heated to a temperature of 125C to activate the flux in the solder paste. The temperature ramp up rate, R1, is limited to 4C per second to allow for even heating of both the PC board and HSDL-3600 castellation I/O pins.
Process zone P2 should be of sufficient time duration (> 60 seconds) to dry the solder paste. The temperature is raised to a level just below the liquidus point of the solder, usually 170C (338F). Process zone P3 is the solder reflow zone. In zone P3, the temperature is quickly raised above the liquidus point of solder to 230C (446F) for optimum results. The dwell time above the liquidus point of solder should be between 15 and 90 seconds. It usually takes about 15 seconds to assure proper coalescing of the solder balls into liquid solder and the formation of good solder connections. Beyond a dwell time of 90 seconds, the intermetallic growth within the solder connections becomes excessive,
resulting in the formation of weak and unreliable connections. The temperature is then rapidly reduced to a point below the solidus temperature of the solder, usually 170C (338F), to allow the solder within the connections to freeze solid. Process zone P4 is the cool down after solder freeze. The cool down rate, R5, from the liquidus point of the solder to 25C (77F) should not exceed -3C per second maximum. This limitation is necessary to allow the PC board and HSDL-3600 castellation I/O pins to change dimensions evenly, putting minimal stresses on the HSDL-3600 transceiver.
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Appendix A: Test Method A1. Background Light and Electromagnetic Field There are four ambient interference conditions in which the receiver is to operate correctly. The conditions are to be applied separately: 1. Electromagnetic field: 3 V/m maximum (please refer to IEC 801-3, severity level 3 for details). 2. Sunlight: 10 kilolux maximum at the optical port. This is simulated with an IR source having a peak wavelength within the range of 850 nm to 900 nm and a spectral width of less than 50 nm biased to provide 490 W/cm2 (with no modulation) at the optical port. The light source faces the optical port. This simulates sunlight within the IrDA spectral range. The effect of longer wavelength radiation is covered by the incandescent condition.
3. Incandescent Lighting: 1000 lux maximum. This is produced with general service, tungsten-filament, gas-filled, inside frosted lamps in the 60 Watt to 100 Watt range to generate 1000 lux over the horizontal surface on which the equipment under test rests. The light sources are above the test area. The source is expected to have a filament temperature in the 2700 to 3050 Kelvin range and a spectral peak in the 850 to 1050 nm range. 4. Fluorescent Lighting: 1000 lux maximum. This is simulated with an IR source having a peak wavelength within the range of 850 nm to 900 nm and a spectral width of less than 50 nm biased and modulated to provide an optical square wave
signal (0 W/cm2 minimum and 0.3 W/cm2 peak amplitude with 10% to 90% rise and fall times less than or equal to 100 ns) over the horizontal surface on which the equipment under test rests. The light sources are above the test area. The frequency of the optical signal is swept over the frequency range from 20 kHz to 200 kHz. Due to the variety of fluorescent lamps and the range of IR emissions, this condition is not expected to cover all circumstances. It will provide a common floor for IrDA operation.
All Avago IR transceivers operating under the recommended drive conditions are classified as CENELEC EN60825-1 Accessible Emission Limit (AEL) Class 1. This standard is in effect in Europe as of January 1, 1997. AEL Class 1 LED devices are considered eye safe. Please see Application Note 1094 for more information.
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Appendix B : HSDL-3600#007/#017 SMT Assembly Application Note 1.0 Solder Pad, Mask and Metal Solder Stencil Aperture
STENCIL APERTURE
METAL STENCIL FOR SOLDER PASTE PRINTING
LAND PATTERN
SOLDER MASK PCBA
Figure 1.0. Stencil and PCBA.
1.1 Recommended Land Pattern for HSDL-3600#007/#017
Dim. a b c (pitch) d e f g
mm 2.40 0.70 1.10 2.35 2.80 3.13 4.31
Inches 0.095 0.028 0.043 0.093 0.110 0.123 0.170
a
SHIELD SOLDER PAD Tx LENS e Rx LENS
d g b
Y
f
X
theta
FIDUCIAL
10x PAD
c
FIDUCIAL
Figure 2.0. Top view of land pattern.
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1.2 Adjacent Land Keep-out and Solder Mask Areas Dim. h j k l mm min. 0.2 13.4 4.7 3.2 Inches min. 0.008 0.528 0.185 0.126
Note: Wet/Liquid Photo-Imaginable solder resist/mask is recommended.
j
* Adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area. * "h" is the minimum solder resist strip width required to avoid solder bridging adjacent pads. * It is recommended that 2 fiducial cross be placed at mid-length of the pads for unit alignment.
Tx LENS
Rx LENS
LAND
h Y
SOLDER MASK
k
l
2.0 Recommended Solder Paste/ Cream Volume for Castellation Joints Based on calculation and experiment, the printed solder paste volume required per castellation pad is 0.30 cubic mm (based on either no-clean or aqueous solder cream types with typically 60 to 65% solid content by volume).
Figure 3.0. HSDL-3600#007/#017 PCBA - adjacent land keep-out and solder mask.
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2.1 Recommended Metal Solder Stencil Aperture It is recommended that only 0.152 mm (0.006 inches) or 0.127 mm (0.005 inches) thick stencil be used for solder paste printing.
This is to ensure adequate printed solder paste volume and no shorting. The following combination of metal stencil aperture and metal stencil thickness should be used:
See Fig 4.0 t, nominal stencil thickness l, length of aperture mm inches mm inches 0.152 0.006 2.8 0.05 0.110 0.002 0.127 0.005 3.4 0.05 0.134 0.002 w, the width of aperture is fixed at 0.70 mm (0.028 inches) Aperture opening for shield pad is 2.8 mm x 2.35 mm as per land dimensions
APERTURE AS PER LAND DIMENSIONS t (STENCIL THICKNESS)
SOLDER PASTE
w l
Figure 4.0 Solder paste stencil aperture.
3.0 Pick and Place Misalignment Tolerance and Product SelfAlignment after Solder Reflow If the printed solder paste volume is adequate, the unit will self-align in the X-direction after solder reflow. Units should be properly reflowed in IR Hot Air convection oven using the recommended reflow profile. The direction of board travel does not matter.
Allowable Misalignment Tolerance X - direction Theta - direction 0.2 mm (0.008 inches) +/- 2 degrees
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3.1 Tolerance for X-axis Alignment of Castellation Misalignment of castellation to the land pad should not exceed 0.2 mm or approximately half the width of the castellation during
placement of the unit. The castellations will completely selfalign to the pads during solder reflow as seen in the pictures below.
Photo 1.0. Castellation misaligned to land pads in x-axis before reflow.
Photo 2.0. Castellation self-align to land pads after reflow.
3.2 Tolerance for Rotational (Theta) Misalignment Units when mounted should not be rotated more than 2 degrees with reference to center X-Y as specified in Fig 2.0. Pictures 3.0 and 4.0 show units before and
after reflow. Units with a Theta misalignment of more than 2 degrees do not completely self align after reflow. Units with 2 degree rotational or Theta misalignment self-aligned completely after solder reflow.
Photo 3.0. Unit is rotated before reflow.
Photo 4.0. Unit self-aligns after reflow.
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3.3 Y-axis Misalignment of Castellation In the Y-direction, the unit does not self-align after solder reflow. It is recommended that the unit be placed in line with the fiducial
mark (mid-length of land pad.) This will enable sufficient land length (minimum of 1/2 land length.) to form a good joint. See Fig 5.0.
LENS EDGE FIDUCIAL
Y
MINIMUM 1/2 THE LENGTH OF THE LAND PAD
Figure 5.0. Section of a castellation in Y-axis.
3.4 Example of Good HSDL-3600 #007/#017 Castellation Solder Joints
4.0 Solder Volume Evaluation and Calculation Geometry of an HSDL-3600#007/#017 solder fillet.
0.425 0.20
0.8
1.2
0.70
Photo 5.0. Good solder joint.
0.4
0.7
This joint is formed when the printed solder paste volume is adequate, i.e., 0.30 cubic mm and reflowed properly. It should be reflowed in IR Hot-air convection reflow oven. Direction of board travel does not matter.
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Appendix C: HSDL-3600#008/#018 SMT Assembly Application Note 1.0 Solder Pad, Mask and Metal Solder Stencil Aperture
STENCIL APERTURE
METAL STENCIL FOR SOLDER PASTE PRINTING
LAND PATTERN
SOLDER MASK PCBA
Figure 1.0. Stencil and PCBA.
1.1 Recommended Land Pattern for HSDL-3600#008/#018 Dim. a b c (pitch) d e f g h mm 1.95 0.60 1.10 1.60 5.70 3.80 2.40 0.80 Inches 0.077 0.024 0.043 0.063 0.224 0.150 0.094 0.032
SHIELD SOLDER PAD e
d g
Y
Rx LENS b theta Tx LENS f
X
h
a
FIDUCIAL
10x PAD
c
FIDUCIAL
Figure 2.0. Top view of land pattern.
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1.2 Adjacent Land Keep-out and Solder Mask Areas Dim. h j k l mm min. 0.2 13.4 5.8 3.5 Inches min. 0.008 0.528 0.228 0.130
Note: Wet/Liquid Photo-Imaginable solder resist/mask is recommended.
* Adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area. * "h" is the minimum solder resist strip width required to avoid solder bridging adjacent pads. * It is recommended that 2 fiducial cross be placed at midlength of the pads for unit alignment.
j
Rx LENS
Tx LENS
LAND
h Y
SOLDER MASK
k
l
Figure 3.0. HSDL-3600#008/#018 PCBA - Adjacent land keep-out and solder mask.
2.0 Recommended Solder Paste/ Cream Volume for Castellation Joints Based on calculation and experiment, the printed solder paste volume required per castellation pad is 0.28 cubic mm (based on either no-clean or aqueous solder cream types with typically 60 to 65% solid content by volume).
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2.1 Recommended Metal Solder Stencil Aperture It is recommended that only 0.152 mm (0.006 inches) or 0.127 mm (0.005 inches) thick stencil be used for solder paste printing.
This is to ensure adequate printed solder paste volume and no shorting. The following combination of metal stencil aperture and metal stencil thickness should be used:
See Fig 4.0 t, nominal stencil thickness l, length of aperture mm inches mm inches 0.152 0.006 3.1 0.05 0.122 0.002 0.127 0.005 3.7 0.05 0.147 0.002 w, the width of aperture is fixed at 0.60 mm (0.024 inches) Aperture opening for shield pad is 5.7 mm x 1.6 mm as per land dimensions
APERTURE AS PER LAND DIMENSIONS t (STENCIL THICKNESS)
SOLDER PASTE
w l
Figure 4.0. Solder paste stencil aperture.
3.0 Pick and Place Misalignment Tolerance and Product SelfAlignment after Solder Reflow If the printed solder paste volume is adequate, the unit will selfalign in X-direction after solder reflow. Units should be properly reflowed in IR Hot Air convection oven using the recommended reflow profile. The direction of board travel does not matter.
Allowable Misalignment Tolerance X - direction 0.2 mm (0.008 inches)
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3.1 Tolerance for X-axis Alignment of Castellation Misalignment of castellation to the land pad should not exceed 0.2 mm or approximately half the width of the castellation during
placement of the unit. The castellations will completely selfalign to the pads during solder reflow as seen in the pictures below.
Castellation
Photo 1.0. Castellation mis-aligned to land pads in X-axis before reflow.
3.2 Tolerance for Rotational (Theta) Misalignment Units when mounted should not be rotated more than 1 degrees with reference to center X-Y as specified in Fig. 2.0. Photos 3.0
Photo 3.0. Unit is rotated before reflow.
Solder
Photo 2.0. Castellation self-aligned to land pads after reflow.
and 4.0 show that unit cannot be self-aligned back due to the small wetting force. Units with a Theta misalignment of more than 1 degree do not completely self align after reflow.
Photo 4.0. Unit not self-aligned after reflow.
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3.3 Y-axis Misalignment of Castellation In the Y-direction, the unit does not self align after solder reflow. It is recommended that the unit
be placed in line with the fiducial mark. This will enable sufficient land length to form a good joint. See Fig. 5.0.
Tx LENS Rx LENS
FIDUCIAL EDGE
Y
Figure 5.0. Section of a castellation in Y-axis.
3.4 Example of Good Castellation Solder Joints
Photo 6.0. Good attachment before reflow.
Photo 7.0. Good solder joint after reflow.
This joint is formed when the printed solder paste volume is adequate, i.e. 0.30 cubic mm and reflowed properly. It should be
reflowed in IR Hot-air convection reflow oven. Direction of board travel does not matter.
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4.0 Solder Volume Evaluation and Calculation Geometry of an HSDL-3600#008/#018 solder fillet.
0.46
0.6 0.6
0.1 0.8 1.15
Vsolder = (0.8 x 0.6 x 0.1) + (0.5 x 0.6 x 0.46 (0.6 + 1.15)/2) = 0.1662 mm3 Vpaste = Vsolder/0.6 = 0.277 mm3
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Appendix D: General Application Guide for the HSDL-3600 Infrared IrDA(R) Compliant 4 Mb/s Transceiver Description The HSDL-3600 wide voltage operating range infrared transceiver is a low-cost and small form factor that is designed to address the mobile computing market such as notebooks, printers and LAN access as well as small embedded mobile products such as digital cameras, cellular phones, and PDAs. It is fully compliant to IrDA 1.1 specification up to 4 Mb/s, and supports HP-SIR, Sharp ASK, and TV Remote modes. The design of the HSDL3600 also includes the following unique features: * Low passive component count. * Adjustable Optical Power Management (full, 2/3, 1/3 power). * Shutdown mode for low power consumption requirement. * Single-receive output for all data rates. Adjustable Optical Power Management The HSDL-3600 transmitter offers useradjustable optical power levels. The use of two logic-level modeselect input pins, MODE 0 and MODE 1, offers shutdown mode as well as three transmit power levels as shown in the Table below. The power levels are setup to correspond nominally to maximum, two-third, and onethird of the transmission distance. This unique feature allows lower optical power to be transmitted at shorter link distances to reduce power consumption.
MODE 1 0 0 1
MODE 1 0 0 1 1
Transmitter Shutdown Full Power 2/ Power 3 1/ Power 3
There are 2 basic means to adjust the optical power of the HSDL-3600: Dynamic: This implementation enables the transceiver pair to adjust their transmitter power according to the link distance. However, this requires the IrDA protocol stack (mainly the IrLAP layer) to be modified. Please contact Hewlett Packard Application group for further details. Static: Pre-program the ROM BIOS of the system (e.g. notebook PC, digital camera, cell phones, or PDA) to allow the end user to select the desired optical power during the system setup stage. Selection of Resistor R1 Resistor R1 should be selected to provide the appropriate peak pulse LED current over different ranges of Vcc. The recommended R1 for the voltage range of 2.7 V to 3.3 V is 2.2 while for 3.0 V to 3.6 V is 2.7 . The HSDL-3600 typically provides
250 mW/sr of intensity at the recommended minimum peak pulse LED current of 400 mA. Interface to Recommended I/O Chips The HSDL-3600's TXD data input is buffered to allow for CMOS drive levels. No peaking circuit or capacitor is required. Data rate from 9.6 kb/s up to 4 Mb/s is available at the RXD pin. The FIR_SEL pin selects the data rate that is receivable through RXD. Data rates up to 115.2 kb/s can be received if FIR_SEL is set to logic low. Data rates up to 4 Mb/s can be received if FIR_SEL is set to logic high. Software driver is necessary to program the FIR_SEL to low or high at a given data rate. 4 Mb/s IR link distance of greater than 1.5 meters have been demonstrated using typical HSDL-3600 units with National Semiconductor's PC87109 3 V Endec and Super I/Os, and the SMC Super I/O chips.
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(A) National Semiconductor Super I/O and Infrared Controller For National Semiconductor Super I/O and Infrared Controller chips, IR link can be realized with the following connections: * Connect IRTX of the National Super I/O or IR Controller to TXD (pin 9) of the HSDL-3600. * Connect IRRX1 of the National Super I/O or IR Controller to RXD (pin 8) of the HSDL-3600. * Connect IRSL0 of the National Super I/O or IR Controller to FIR_SEL (pin 3) of the HSDL-3600.
Please refer to the table below for the IR pin assignments for the National Super I/O and IR Controllers that support IrDA 1.1 up to 4 Mb/s:
PC97/87338VJG PC87308VUL PC87108AVHG PC87109VBE
IRTX 63 81 39 15
IRRX1 65 80 38 16
IRSL0 66 79 37 14
Please refer to the National Semiconductor data sheets and application notes for updated information.
VCC
Functional Block Diagram
R1 LEDA (10)
TXD (9) SP IRTX NATIONAL SEMICONDUCTOR SUPER I/O OR IR CONTROLLER MD0 (4) MD1 (5) * * RXD (8) IRSL0 FIR_SEL (3) CX1 GND (7) * MODE GROUND FOR FULL POWER OPERATION CX2 VCC (1) AGND (2) HSDL-3600
IRRX1
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(B) HSDL-3600 Interoperability with National Semiconductor PC97338VJG SIO Evaluation Report Introduction The objective of this report is to demonstrate the interoperability of the HSDL-3600 IR transceiver IR module as wireless communication ports at the speed of 2.4 kb/s - 4 Mb/s with NS's PC97338VJG Super I/O under typical operating conditions. Test Procedures 1. Two PC97338VJG evaluation boards were connected to the ISA Bus of two PCs (Pentium 200 MHz) running Microsoft's DOS operating system. One
system with an HSDL-3600 IR transceiver connected to the PC97338VJG evaluation board will act as the master device. Another system with an HSDL-3600 IR transceiver connected to the PC97338VJG will act as the slave device (i.e. Device Under Test). 2. The test software used in this interoperability test is provided by National Semiconductor. A file size of 1.7M byte from the master device, with the PC97338VJG performing the framing, encoding is transmitted to the slave device. The slave device,
with the PC97338VJG performing the decoding, and CRC checksum, will receive the file. The file is then checked for error by comparing the received file with the original file using the DOS "fc" command. 3. The link distance is measured by adjusting the distance between the master and slave for errorless data communications.
Functional Block Diagram
14.314 MHz CLOCK
VCC
R1 LEDA (10)
A0 - A3 RD, WR, CS
SYSTEM BUS
TXD (9) SP IRTX (63) NATIONAL SEMICONDUCTOR PC97338VJG SUPER I/O MD0 (4) MD1 (5) * * RXD (8) IRSL0 (66) FIR_SEL (3) CX1 GND (7) * MODE GROUND FOR FULL POWER OPERATION CX2 VCC (1) AGND (2) HSDL-3600
D0 - D7 DRQ DACK, TC IRQ
IRRX1 (65)
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HSDL-3600 Interoperability with NS PC97338 Report (i) Test Conditions Vcc = 3.0 - 3.6 V RLED = 2.7 Optical transmitter pulse width = 125 ns Mode set to full power (ii) Test Result The interoperability test results show that HSDL-3600 IR transceiver can operate 1.5 meter link distance from 3 V to 3.6 V with NS's PC97338 at any IrDA 1.1 data rate without error.
(C) Standard Micro System Corporation (SMC) Super and Ultra I/O Controllers For SMC Super and Ultra I/O Controller chips, IR link can be realized with the following connections: * Connect IRTX of the SMC Super or Ultra I/O Controller to TXD (pin 9) of the HSDL3600. * Connect IRRX of the SMC Super or Ultra I/O Controller to RXD (pin 8) of the HSDL3600. * Connect IRMODE of the Super or Ultra I/O Controller to FIR_SEL (pin 3) of the HSDL3600. Please refer to the table below for the IR pin assignments for the SMC Super or Ultra I/O Controllers that support IrDA 1.1 up to 4Mb/s: IRTX 89 87 204
HSDL-3600 Interoperability with SMC 669/769 Report (i) Test Conditions Vcc = 3.0 - 3.6 V RLED = 2.7 Optical transmitter pulse width = 125 ns Mode set to full power (ii) Test Result The interoperability test results show that HSDL-3600 IR transceiver can operate 1.5 meter link distance from 3 V to 3.6 V with SMC 669/769 at any IrDA 1.1 data rate without error.
FDC37C669FR FDC37N769 FDC37C957/8FR
IRRX 88 86 203
IRMODE 23 21 145 or 190
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HSDL-3600 Interoperability with SMC's Super I/O or IR Controller
VCC
R1 LEDA (10)
IRRX
RXD (8)
STANDARD MICROSYSTEM CORPORATION SUPER I/O OR IR CONTROLLER
IRMODE
FIR_SEL (3) HSDL-3600
IRTX
TXD (9)
SP
MD0
MD1
CX1 GND (7)
MODE GROUND FOR FULL POWER OPERATION
CX2 4 5 VCC (1) AGND (2)
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For product information and a complete list of distributors, please go to our website:
www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Pte. in the United States and other countries. Data subject to change. Copyright (c) 2006 Avago Technologies Pte. All rights reserved. Obsoletes 5980-0460E 5988-2311EN April 20, 2006

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